1. Field
Example embodiments relate to a method of programming a non-volatile memory device, and for example, to a method of programming a non-volatile memory device which may more efficiently reduce a threshold voltage distribution in a program state.
2. Description of Related Art
Non-volatile memories are storage devices capable of maintaining stored data even if a supply of power is discontinued. Floating gate type flash memories, which are operated by storing electrical charges in a floating gate formed of polysilicon, have been commercialized as an example of larger capacity non-volatile memories. A memory cell of a flash memory is classified into a single level cell (SLC) type in which two record states of “1” and “0” are respectively recorded in a single cell, and a multi-level cell (MLC) type in which four or more record states, for example, “11”, “10”, “01”, and “00”, are respectively recorded in a single cell.
Multi-level cell technology is used in making a larger capacity NAND or NOR type flash memory. In the operation of a MLC, each of the record states may be separately recognized only if a distribution of threshold values Vth of cells corresponding to a respective record state is relatively smaller.
An incremental step pulse programming (ISPP) scheme for repeatedly applying a program voltage Vpgm while constantly increasing the program voltage Vpgm may be used to reduce a threshold voltage distribution between memory cells in a flash memory. According to the ISPP scheme, a step of applying a program voltage pulse Vpgm while increasing the amount of an input program voltage pulse by ΔVpgm and checking a threshold voltage of a memory cell by applying a verifying voltage pulse is repeated so that the threshold voltage of the memory cell reaches a desired, or alternatively, a predetermined value. Because a plurality of memory cells forming a flash memory have an initial threshold voltage distribution, the ISPP scheme is introduced to allow all memory cells to reach a desired, or alternatively, a predetermined threshold voltage by considering the threshold voltage distribution for each memory cell.
However, as a size of a cell decreases in a flash memory using a floating gate, coupling between cells, in particular, coupling between the floating gates, increases such that controlling the distribution of the threshold voltage is more difficult. Recently, to reduce the coupling between cells, a charge trap flash (CTF) memory using, instead of the floating gate, an insulating layer including a charge trap site, e.g., silicon nitride Si3N4, as a charge trap layer, which may trap electrical charges, has been developed.
During programming of the CTF memory, implanted electrons are trapped in the charge trap layer and localized therein. The injected electrons are thermalized in a deep trap and spatially spread in a nitride film. Accordingly, because the threshold voltage of the CTF memory changes as the electrons are thermalized and spread in the nitride film, e.g., during the thermalization of the localized electrons, time is needed until the threshold voltage Vth is fixed.
Therefore, in the CTF memory, the threshold voltage Vth characteristically changes according to time due to the movement of the charges trapped in the charge trap layer after programming. The time-dependent threshold voltage change makes controlling the distribution of a threshold voltage during programming in the ISPP scheme more difficult.
If the threshold voltage Vth changes according to the time, an error may occur in the verification of a program state after a desired, or alternatively, a predetermined time has passed after the programming. Due to such a verification error, the distribution of a threshold voltage of a program state obtained by the ISPP type program may increase.
For example, if the threshold voltage changes according to time, even if the threshold voltage may reach a target value as time passes, a verification error may occur as a result of verification because a memory cell fails to reach the threshold voltage before the verification. If the target threshold voltage is verified to have not been reached, a program voltage that is increased by ΔVpgm is applied for programming so that an over-program occurs in which the threshold voltage excessively increases. Accordingly, the distribution of the threshold voltage of the program state increases.